Variable Frequency Drives (VFDs) with diode rectifier front ends are typically equipped with a resistor-contactor arrangement to limit the inrush current into the DC bus capacitors, thereby providing a means for soft charging the DC bus capacitors. Because of the mechanical nature of the magnetic contactor typically used in VFDs, there exists a concern of reliability. In addition, during a brown out condition, typically the contactor remains closed and when the voltage recovers, the ensuing transient is often large enough to possibly cause unfavorable influence to surrounding components in the VFD. Many researchers and application engineers have thought about this problem but have not been able to resolve the dilemma in a cost effective manner.
AC to DC rectifiers are widely used to convert AC line electric power to DC power to be used by inverters (for motor, UPS, and other applications), DC/DC converters, and passive loads such as resistors. In any rectifier circuit, the AC line voltages are rectified and ripple of the rectified voltage is filtered using a parallel capacitor and occasionally a series inductor. This results in a fixed, i.e., ripple free, DC voltage.
Without appropriate pre-charge circuitry, the start-up transients can be harmful to the systems. If the AC line and/or the DC link filters do not have sufficient impedance, significant switching transients may occur upon closing a three-phase supply switch. A large current surge charges the capacitor and depending on the system impedance, the surge current can reach prohibitive levels. As a result, the rectifier switches and the filter components (inductors and DC bus capacitors) may fail due to the excessive current/voltage through them. The transients may also create electromagnetic interference that may interfere with other equipment in the power system and can lead to a catastrophic failure. Therefore, during start-up it is mandatory to establish a high impedance path between the large AC line voltages and the DC bus capacitor. This task can be accomplished by a pre-charge or soft charge circuit that is placed in series with the DC bus output of the rectifier. The main task of the soft charge circuit is to exhibit sufficiently high impedance during start-up and zero impedance during normal operation.
Known voltage source inverters (VSI) that have a large DC bus capacitor filter use a resistor-contactor arrangement to limit the inrush current into the capacitors, and thereby provide a means to soft-charge the DC bus capacitor CDC, see FIG. 1(a). Because of the mechanical nature of the contactor, the reliability of the variable frequency drive (VFD) is adversely affected. Moreover, the time delay involved in the basic response of the contactor can result in an unfavorable sequence of events during a brown out condition. Given these facts, the soft-charge circuit is often considered to be the weakest part of an otherwise well designed VFD.
The typical prior art VFD system shown in FIG. 1(a) employs the soft charge circuit including a resistor RSC and a contactor switch MC connected in parallel. The resistor RSC is sized for the start-up charging transient while the contactor switch MC is sized for the normal operation. During start-up the contactor switch MC is open (not conducting) and it remains so until the DC bus capacitor voltage reaches a critical value (roughly near rated operating voltage). Once the critical voltage level is reached, then the contactor switch MC is closed, and the resistor RSC is by-passed.
The rectifier system of FIG. 1(a) exhibits high energy-efficiency because the contactor switch MC has very low conduction losses and the large pre-charge transients are limited to less harmful levels. If for any reason the input AC supply experiences a large dip either due to brown out condition or due to a large load being suddenly applied across the AC supply, there is a possibility that the soft-charge contactor does not open and remains closed. When the input AC supply recovers, the resulting surge current can be large and damage the input rectifiers, and the DC bus capacitor. When large current flows through the soft charge resistor during such events, the contacts can even melt and fuse together, rendering them useless for future use. Hence, by nature, this approach does not yield a highly reliable solution. Also, due to mechanical actuation, the mechanical contactor switch wear-out is rapid and inevitable. Therefore, the life of the contactor is limited and in general much shorter than most of the stationary electrical parts inside a rectifier system.
There have been suggestions of replacing the magnetic contactor MC in FIG. 1(a) with a semiconductor switch, as shown in FIG. 1(b). However, the semiconductor switch requires intelligent control logic circuitry and is associated with steady-state power loss.
Thyristor controlled rectifiers have been used in VFDs but the additional gate circuit adds cost and increases the component count, which reduces reliability. With one known topology, the input rectifiers are replaced by thyristors. The triggering angle of the thyristors is controlled in such a manner that the DC bus capacitor charges up smoothly with no inrush. When a brown out occurs, the thyristor angle is such that it provides the maximum output voltage possible, similar to a typical diode bridge. When the voltage recovers after a brown out condition, the difference between the peak value of the input voltage and the DC bus voltage is large enough to force the triggering angle to increase and thereby reduce the high inrush current. The technique, shown in FIG. 2, is well established and is used by some VFD manufacturers. However, this VFD needs six pack thyristor modules, which can be expensive, especially for small sizes due to low volume of production by semiconductor manufacturers. The VFD needs six gate-trigger circuits along with sensing and decision making logic (The trigger circuits along with the necessary logic occupy space and are expensive). The thyristors may cause a voltage notching effect if the regulated output voltage is lower than that achievable from the input ac source—this will require the use of input AC inductor that occupies space and is an added cost. Finally, gate drive and logic circuits reduce mean time between failures (MTBF) due to the increased component count in the VFD.
A second alternative topology uses a Magneto Resistive (MR) device that shows high resistance under the influence of large magnetic field and low resistance when the magnetic field resets to a lower level. The MR element could be connected in series with the DC bus capacitor to soft charge it at start up or during the recovery time after a brown out condition. The circuit configuration is shown in FIG. 3(a) and the conceptual schematic in FIG. 3(b).
More recently, two alternate techniques of soft charging the DC bus of a VFD have been proposed. The first of these two techniques pertains to a method known as two-stage charging method. This topology borrows the idea of a typical star-delta starter used in conventional 3-phase ac motors. The DC bus capacitor is charged as a “semiconverter” at start. Once the DC bus voltage reaches the steady state voltage dictated by the semiconverter, the full converter configuration is engaged, resulting in a second charge up period. Since the charging is carried out in two stages, the inrush current through the inductor, capacitor, and diode is well controlled with almost no stress. The switching from the semiconverter configuration to the full bridge configuration can either be dictated by level of DC bus voltage or by a timer. The topology shown in FIG. 4 and satisfies most of the target features discussed herein.
When AC power is applied to the circuit shown in FIG. 4, an inrush current begins to flow, assuming that the DC bus capacitor has no initial stored voltage. The inrush current is directed to flow into the dummy wye connected inductor through the blocking diode D, by maintaining the auxiliary switch SW1 in the OFF state. Since the impedance of the wye connected dummy inductor can be chosen, the charging time as well as the peak amplitude of charging current can be manipulated. Hence, the inrush current through the inductor, capacitor, and diode is well controlled with almost no stress. The switching from the semi-converter configuration to the full bridge configuration can either be dictated by level of DC bus voltage or by a timer. The value of the dummy inductor in FIG. 4 is chosen to be such that the resulting circulating current is about 0.01 pu of the rated current. Both these methods have been simulated and found to yield acceptable results.
When AC power is applied to the circuit shown in FIG. 5, an inrush current begins to flow, assuming that the DC bus capacitor has no initial stored voltage. The inrush current is divided into two distinct paths. The first path is through the resistor-thyristor (TH2) combination and the second path is through the DC bus inductor, LDC. The current through the resistor-thyristor path is initially higher and quicker than that through LDC since the inductor delays the buildup of current. The DC bus capacitor CDC starts to charge, with the resistor-thyristor combination providing as much charging as possible. The second charging path, through LDC, creates a resonant circuit. Due to the nature of LC circuit, the voltage across the DC bus capacitor CDC tends to increase over and above the peak value of the applied input AC voltage. At this time, the thyristor across LDC, TH1, experiences a forward bias and turns ON. The turning ON of TH1, causes the voltage across the inductor LDC to start failing and eventually turns OFF thyristor TH2 in series with the assist resistor, by reverse biasing it. The inductor voltage linearly ramps to zero and is clamped by TH1. The voltage across the DC bus capacitor CDC stops increasing and eventually discharges into its discharge resistor to a level dictated by the input voltage condition.
The important aspect of the resistor-assist circuit cannot be overlooked since the charging current flowing through LDC is reduced due to the parallel resistor assist circuit. This reduces the stored energy in LDC. It also lowers the saturation current requirement and makes the inductor physically smaller. Due to the LC nature of the circuit, the voltage across the capacitor CDC is still higher than the peak value of the input voltage. The clamping circuit consisting of TH1 assures that the DC bus voltage is clamped to an acceptable value. The circuit shown in FIG. 6 satisfies the target requirements discussed herein.
The present invention is directed to satisfying the requirements discussed above, in a novel and simple manner.